The present disclosure relates generally to fabrication of micro-electro mechanical systems (MEMS) devices, and more particularly, to wafer backside alignment in fabrication of MEMS devices. The present disclosure also relates to an improved method and device for determining an overlay accuracy of wafer backside alignment in fabrication of MEMS devices.
MEMS devices are common in applications, including wafer leveling packaging, integrated optics, pressure sensors, compound devices, and backside vias. In fabrication of three-dimensional devices such as MEMS, the substrate is processed on one side, flipped over, and is processed on the opposite side to create a desired three-dimensional structure. Front-side and backside alignment are performed to ensure that the three-dimensional structure is properly aligned. For example, if a contact runs through the substrate from the front-side to the backside, it must be precisely aligned to other elements of the device, such that electrical contacts can be made.
Therefore, what is needed is a simple and cost effective method and device for determining an overlay accuracy of a wafer backside alignment process.